1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device for displaying an image on a liquid crystal (LC) panel, and more particularly, to an LCD device allowing modulated gate scan signals to be supplied on gate lines of an LC panel, and a driving method thereof.
2. Description of the Related Art
An LCD device controls light transmittance of liquid crystals according to video data so as to display an image corresponding to the video data. The LCD device can provide a large screen size with a slim profile, which is light in weight. LCD devices are used as a display device of a computer or a television receiver, and may substitute for a cathode ray tube (CRT) display device.
To display an image corresponding to video data, an LCD device includes driving circuits for driving an LC panel. The LC panel includes pixels arranged in a matrix. Referring to FIG. 1, each pixel includes a thin film transistor (TFT) MT that responds to a scan signal on a gate line GL to switch a pixel drive signal to be supplied to an LC cell from a data line DL. A voltage charges an LC cell CLC via the TFT MT and initially reaches a voltage level of a pixel drive signal on the data line DL, and then drops by a predetermined voltage ΔVp. Accordingly, the voltage charging the LC cell CLC has a deviation ΔVp from a voltage of the pixel drive signal. This deviation is due to parasitic capacitance in the TFT MT. Consequently, flicker and crosstalk noise are generated on an image displayed on the LC panel.
To prevent effects caused by a difference between the voltage of the pixel drive signal on the data line DL and the voltage charging the LC cell CLC, it has been proposed to slowly modulate a falling edge of a gate scan signal. As illustrated in FIG. 2, a related art LCD device is shown that modulates a gate scan signal, and includes a gate driver 12 for sequentially driving a plurality of gate lines GL1-GLn on an LC panel 10, a data driver 14 for supplying pixel drive voltages to a plurality of data lines DL1-DLm, and a timing controller 16 for controlling the gate driver 12 and the data driver 14.
The gate driver 12 sequentially enables the plurality of gate lines GL1-GLn by a predetermined period (for example, by a period of one horizontal synchronization signal) during one frame. For this purpose, the gate driver 12 generates a plurality of gate scan signals exclusively and respectively having enable pulses that are sequentially shifted every period of a horizontal synchronization signal. Also, the gate driver 12 selectively switches a gate low voltage Vg1 from a gate low voltage generator 20, and a gate high voltage Vgh from a gate high voltage generator 22, to the plurality of gate lines GL1-GLn such that a gate scan signal varies between the gate low voltage Vg1 and the gate high voltage Vgh.
A gate high voltage Vgh is supplied from the gate high voltage generator 22 to the gate deriver 12 and is modulated by a modulating unit 24, such that the gate high voltage Vgh has an impulse of a negative polarity every predetermined period (i.e., the period of a horizontal synchronization signal). The modulating unit 24 includes a modulator 24A connected between the gate high voltage generator 22 and the gate driver 12, a resistor Re connected between the modulator 24A and the gate high voltage generator 22, and a capacitor Ce connected between the resistor Re and an input terminal of the modulator 24A and a ground voltage line GND. The width of an impulse of a negative polarity contained in a modulated gate high voltage signal supplied to the gate driver 12 is determined by a time constant based on the resistance Re and the capacitance Ce.
However, the gate lines GL1-GLn connected to pixels in a line have a deviation in resistance and capacitance depending on the LC panel. The deviation in the resistance and capacitance of the gate lines changes the width of the impulse of the negative polarity contained in the gate high voltage, which causes a deviation ΔVp between a voltage charging an LC cell CLC and a voltage of a pixel drive signal on the data line DL. This deviation is due to an increase of an enable section of a gate high voltage. Accordingly, flicker and crosstalk noise are generated on an image displayed on an LC panel of such related art LCD devices.